1 C3M0065090D silicon carbide power mosfet c3 m tm mosfet technology n-channel enhancement mode features ? new c3m sic mosfet technology ? high blocking voltage with low on-resistance ? high speed switching with low capacitances ? fast intrinsic diode with low reverse recovery (qrr) ? halogen free, rohs compliant benefts ? higher system efciency ? reduced cooling requirements ? increased power density ? increased system switching frequency applications ? renewable energy ? ev battery chargers ? high voltage dc/dc converters ? switch mode power supplies package part number package C3M0065090D to-247-3 v ds 900 v i d @ 25?c 36 a r ds(on) 65 m ? maximum ratings (t c = 25 ?c unless otherwise specifed) symbol parameter value unit test conditions note v dsmax drain - source voltage 900 v v gs = 0 v, i d = 100 a v gsmax gate - source voltage -8/+18 v absolute maximum values v gsop gate - source voltage -4/+15 v recommended operational values i d continuous drain current 36 a v gs = 15 v, t c = 25?c fig. 19 23 v gs = 15 v, t c = 100?c i d(pulse) pulsed drain current 90 a pulse width t p limited by t jmax fig. 22 e as avalanche energy, single pulse 110 mj i d = 22a, v dd = 50v p d power dissipation 125 w t c =25?c, t j = 150 ?c fig. 20 t j , t stg operating junction and storage temperature -55 to +150 ?c t l solder temperature 260 ?c 1.6mm (0.063) from case for 10s C3M0065090D rev. -
2 electrical characteristics (t c = 25?c unless otherwise specifed) symbol parameter min. typ. max. unit test conditions note v (br)dss drain-source breakdown voltage 900 v v gs = 0 v, i d = 100 a v gs(th) gate threshold voltage 1.8 2.1 v v ds = 10v, i d = 5 ma fig. 11 1.6 v v ds = 10v, i d = 5 ma, t j = 150oc i dss zero gate voltage drain current 1 100 a v ds = 900 v, v gs = 0 v i gss gate-source leakage current 10 250 na v gs = 15 v, v ds = 0 v r ds(on) drain-source on-state resistance 65 78 m ? v gs = 15 v, i d = 20 a fig. 4, 5, 6 90 v gs = 15 v, i d = 20a, t j = 150oc g fs transconductance 13.6 s v ds = 15 v, i ds = 20 a fig. 7 11.6 v ds = 15 v, i ds = 20 a, t j = 150oc c iss input capacitance 660 pf v gs = 0 v, v ds = 600 v f = 1 mhz v ac = 25 mv fig. 17, 18 c oss output capacitance 60 c rss reverse transfer capacitance 4.0 e oss c oss stored energy 16 j fig. 16 e on turn-on switching energy 225 j v ds = 400 v, v gs = -4 v/15 v, i d = 20a, r g(ext) = 2.5?, l= 77 h, t j = 150oc fig. 26 e off turn off switching energy 91 t d(on) turn-on delay time 21 ns v dd = 400 v, v gs = -4 v/15 v i d = 20 a, r g(ext) = 2.5 ?, timing relative to v ds per iec60747-8-4 pg 83 resistive load fig. 27 t r rise time 36 t d(off) turn-off delay time 28 t f fall time 25 r g(int) internal gate resistance 4.7 ? f = 1 mhz , v ac = 25 mv q gs gate to source charge 7.5 nc v ds = 400 v, v gs = -4 v/15 v i d = 20 a per iec60747-8-4 pg 21 fig. 12 q gd gate to drain charge 12 q g total gate charge 30.4 reverse diode characteristics (t c = 25?c unless otherwise specifed) symbol parameter typ. max. unit test conditions note v sd diode forward voltage 4.8 v v gs = -4 v, i sd = 10 a fig. 8, 9, 10 4.4 v v gs = -4 v, i sd = 10 a, t j = 150 c i s continuous diode forward current 21 a v gs = -4 v note 1 i s, pulse diode pulse current 90 a v gs = -4 v, pulse width t p limited by t jmax note 1 t rr reverse recover time 30 ns v gs = -4 v, i sd = 20 a, v r = 400 v dif/dt = 600 a/s note 1 q rr reverse recovery charge 134 nc i rrm peak reverse recovery current 7.5 a note (1): when using sic body diode the maximum recommended v gs = -4v thermal characteristics symbol parameter max. unit test conditions note r jc thermal resistance from junction to case 1.0 c/w fig. 21 r ja thermal resistance from junction to ambient 40 C3M0065090D rev. -
3 0 10 20 30 40 50 60 70 80 0.0 2.5 5.0 7.5 10.0 12.5 15.0 drain - source current, i ds (a) drain - source voltage, v ds (v) conditions: t j = 150 c tp < 200 s v gs = 15 v v gs = 7 v v gs = 13 v v gs = 11 v v gs = 9 v 0 10 20 30 40 50 60 70 80 0.0 2.5 5.0 7.5 10.0 12.5 15.0 drain - source current, i ds (a) drain - source voltage, v ds (v) conditions: t j = - 55 c tp < 200 s v gs = 7 v v gs = 15 v v gs = 13 v v gs = 11 v v gs = 9 v 0 10 20 30 40 50 60 70 80 0.0 2.5 5.0 7.5 10.0 12.5 15.0 drain - source current, i ds (a) drain - source voltage, v ds (v) conditions: t j = 25 c tp < 200 s v gs = 7 v v gs = 15 v v gs = 13 v v gs = 11 v v gs = 9 v figure 2. output characteristics t j = 25 c typical performance figure 5. on-resistance vs. drain current for various temperatures figure 1. output characteristics t -55 c figure 3. output characteristics t 150 c 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 - 50 - 25 0 25 50 75 100 125 150 on resistance, r ds on (p.u.) junction temperature, t j ( c) conditions: i ds = 20 a v gs = 20 v t p < 200 s 0 20 40 60 80 100 120 0 10 20 30 40 50 60 on resistance, r ds on (ohms) drain - source current, i ds (a) conditions: v gs = 20 v t p < 200 s t j = 150 c t j = - 55 c t j = 25 c figure 4. ormalized on-resistance s. temperature 0 20 40 60 80 100 120 140 - 50 - 25 0 25 50 75 100 125 150 on resistance, r ds on (mohms) junction temperature, t j ( c) conditions: i ds = 20 a t p < 200 s v gs = 15 v v gs = 13 v v gs = 11 v figure 6. on-resistance s. temperature for various gate voltage C3M0065090D rev. -
4 typical performance figure 8. body diode characteristic at -55 oc figure 9. body diode characteristic at 25 oc 0 10 20 30 40 50 0 2 4 6 8 10 drain - source current, i ds (a) gate - source voltage, v gs (v) conditions: v ds = 20 v tp 200 s t j = 150 c t j = - 55 c t j = 25 c - 80 - 60 - 40 - 20 0 - 10 - 8 - 6 - 4 - 2 0 drain - source current, i ds (a) drain - source voltage v ds (v) conditions: t j = - 55 c t p 200 s v gs = - 2 v v gs = - 4 v v gs = 0 v - 0 - 0 - 40 - 20 0 - 10 - - - 4 - 2 0 - s s - s v v s v = 25 200 v gs = - 2 v v gs = - 4 v v gs = 0 v - 0 - 0 - 40 - 20 0 - 10 - - - 4 - 2 0 - s s - s v v s v = 150 200 v gs = - 2 v v gs = - 4 v v gs = 0 v 00 05 10 15 20 25 0 - 50 - 25 0 25 50 5 100 125 150 v v v v s = 10 v s = 5 figure 10. body diode characteristic at 150 oc - 4 0 4 8 12 16 0 5 10 15 20 25 30 35 gate - source voltage, v gs (v) gate charge, q g (nc) conditions: i ds = 20 a i gs = 100 ma v ds = 400 v t j = 25 c figure 7. transfer characteristic for various junction temperatures figure 11. threshold voltage vs. temperature figure 12. gate charge characteristics C3M0065090D rev. -
5 typical performance figure 15. 3rd quadrant characteristic at 150 oc figure 13. 3rd quadrant characteristic at -55 oc - 80 - 60 - 40 - 20 0 - 8 - 7 - 6 - 5 - 4 - 3 - 2 - 1 0 drain - source current, i ds (a) drain - source voltage v ds (v) conditions: t j = - 55 c t p 200 s v gs = 10 v v gs = 5 v v gs = 15 v v gs = 0 v - 0 - 0 - 40 - 20 0 - - - - 5 - 4 - - 2 - 1 0 - s s - s v v s v = 25 200 v gs = 10 v v gs = 5 v v gs = 15 v v gs = 0 v - 0 - 0 - 40 - 20 0 - - - - 5 - 4 - - 2 - 1 0 - s s - s v v s v = 150 200 v gs = 10 v v gs = 5 v v gs = 15 v v gs = 0 v figure 14. 3rd quadrant characteristic at 25 oc 0 5 10 15 20 25 30 0 100 200 300 400 500 600 700 800 900 1000 stored energy, e oss (j) drain to source voltage, v ds (v) figure 16. output capacitor stored energy figure 17. capacitances vs. drain-source voltage (0 - 200v) 1 10 100 1000 10000 0 50 100 150 200 capacitance (pf) drain - source voltage, v ds (v) c iss c oss conditions: t j = 25 c v ac = 25 mv f = 1 mhz c rss 1 10 100 1000 10000 0 100 200 300 400 500 600 700 800 900 capacitance (pf) drain - source voltage, v ds (v) c iss c oss conditions: t j = 25 c v ac = 25 mv f = 1 mhz c rss figure 18. capacitances vs. drain-source voltage (0 - 900v) C3M0065090D rev. -
6 1e - 3 10e - 3 100e - 3 1 1e - 6 10e - 6 100e - 6 1e - 3 10e - 3 100e - 3 1 junction to case impedance, z thjc ( o c/w) time, t p (s) 0.5 0.3 0.1 0.05 0.02 0.01 singlepulse typical performance 0 5 10 15 20 25 30 35 40 - 55 - 30 - 5 20 45 70 95 120 145 drain - source continous current, i ds (dc) (a) case temperature, t c ( c) conditions: t j 150 c 0 20 40 60 80 100 120 140 - 55 - 30 - 5 20 45 70 95 120 145 maximum dissipated power, p tot (w) case temperature, t c ( c) conditions: t j 150 c 0.01 0.10 1.00 10.00 100.00 0.1 1 10 100 1000 drain - source current, i ds (a) drain - source voltage, v ds (v) 100 s 1 ms 10 s conditions: t c = 25 c d = 0, parameter: t p 100 ms limited by r ds on figure 22. safe operating area figure 21. transient thermal impedance (junction - case) 0 200 400 600 800 1000 1200 1400 1600 0 10 20 30 40 50 switching energy (uj) drain to source current, i ds (a) conditions: t j = 25 c v dd = 600 v r g(ext) = 2.5 ? v gs = - 4v/+15 v fwd = c3d10060a l = 77 h e off e on e total figure 23. clamped inductive switching energy vs. drain current (v dd = 600v) figure 24. clamped inductive switching energy vs. drain current (v dd = 400v) 0 100 200 300 400 500 600 700 800 900 1000 0 10 20 30 40 50 switching energy (uj) drain to source current, i ds (a) conditions: t j = 25 c v dd = 400 v r g(ext) = 2.5 ? v gs = - 4v/+15 v fwd = c3d10060a l = 77 h e off e on e total figure 19. continuous drain current derating vs. case temperature figure 20. maximum power dissipation derating vs. case temperature C3M0065090D rev. -
7 typical performance 0 200 400 600 800 1000 1200 0 5 10 15 20 25 switching loss (uj) external gate resistor rg(ext) (ohms) e off e on e total conditions: t j = 25 c v dd = 400 v i ds = 20 a v gs = - 4v/+15 v fwd = c3d10060a l = 77 h 0 20 40 60 80 100 120 140 0 5 10 15 20 25 time (ns) external gate resistor, r g(ext) (ohms) conditions: t j = 25 c v dd = 400 v i ds = 20 a v gs = - 4v/+15 v t d (off) t d (on) t f t r 0 100 200 300 400 500 600 - 50 - 25 0 25 50 75 100 125 150 switching loss (uj) junction temperature, t j ( c) e off e on e total conditions: i ds = 20 a v dd = 400 v r g(ext) = 2.5 ? v gs = - 4v/+15 v fwd = c3d10060a l = 77 h figure 26. clamped inductive switching energy vs. temperature figure 27. switching times vs. r g(ext) figure 25. clamped inductive switching energy vs. r g(ext) figure 28. switching times defnition C3M0065090D rev. -
8 test circuit schematic d 1 c3d0 8 0 6 0 g 8a, 6 0 v sic schottky d.u.t c3m0 0 6 5 0 9 0d l=77 uh q 2 v dc d.u. t c3m0 0 6 5 0 9 0 d q 1 v g s = - 3 v c3m 0 0 6 5 0 9 0d r g r g c dc =42 .3 uf l =77 u h q 2 v dc r g c dc =42 .3 uf figure 30. clamped inductive switching waveform test circuit figure 31. body diode recovery test circuit C3M0065090D rev. -
9 package dimensions package to-247-3 recommended solder pad layout to-247-3 pos inches millimeters min max min max a .190 .205 4.83 5.21 a1 .090 .100 2.29 2.54 a2 .075 .085 1.91 2.16 b .042 .052 1.07 1.33 b1 .075 .095 1.91 2.41 b2 .075 .085 1.91 2.16 b3 .113 .133 2.87 3.38 b4 .113 .123 2.87 3.13 c .022 .027 0.55 0.68 d .819 .831 20.80 21.10 d1 .640 .695 16.25 17.65 d2 .037 .049 0.95 1.25 e .620 .635 15.75 16.13 e1 .516 .557 13.10 14.15 e2 .145 .201 3.68 5.10 e3 .039 .075 1.00 1.90 e4 .487 .529 12.38 13.43 e .214 bsc 5.44 bsc n 3 3 l .780 .800 19.81 20.32 l1 .161 .173 4.10 4.40 ?p .138 .144 3.51 3.65 q .216 .236 5.49 6.00 s .238 .248 6.04 6.30 t 9? 11? 9? 11? u 9? 11? 9? 11? v 2? 8? 2? 8? w 2? 8? 2? 8? pinout information: ? pin 1 = gate ? pin 2, 4 = drain ? pin 3 = source t u w v C3M0065090D rev. -
10 10 related links ? sic mosfet isolated gate driver reference design: www.cree.com/power/tools-and-support ? application considerations for silicon-carbide mosfets: www.cree.com/power/tools-and-support C3M0065090D rev - 05-2015 copyright ? 2015 cree, inc. all rights reserved. the information in this document is subject to change without notice. cree, the cree logo, and zero recovery are registered trademarks of cree, inc. cree, inc. 4600 silicon drive durham, nc 27703 usa tel: +1.919.313.5300 fax: +1.919.313.5451 www.cree.com/power ? rohs compliance the levels of rohs restricted materials in this product are below the maximum concentration values (also referred to as the threshold limits) permitted for such substances, or are used in an exempted application, in accordance with eu directive 2011/65/ ec (rohs2), as implemented january 2, 2013. rohs declarations for this product can be obtained from your cree representative or from the product documentation sections of www.cree.com. ? reach compliance reach substances of high concern (svhcs) information is available for this product. since the european chemical agency (echa) has published notice of their intent to frequently revise the svhc listing for the foreseeable future,please contact a cree represen - tative to insure you get the most up-to-date reach svhc declaration. reach banned substance information (reach article 67) is also available upon request. ? this product has not been designed or tested for use in, and is not intended for use in, applications implanted into the human body nor in applications in which failure of the product could lead to death, personal injury or property damage, including but not limited to equipment used in the operation of nuclear facilities, life-support machines, cardiac defbrillators or similar emergency medical equipment, aircraft navigation or communication or control systems, air trafc control systems. notes
|
